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CNF Lab and Equipment Information
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MOS Clean
Wet Deck for SC-1, SC-2 cleaning of wafers 
Manager: Phil Infante
Equipment Training
Training for the furnace area covers the pre-furnace MOS clean, atmospheric and LPCVD processes. It is scheduled on a need basis, please email the tool manager for training requests. Include MOS area training in the subject header. You will be notified when the next scheduled training will be by email. Description:The hot process area has two wet decks for RCA cleaning of substrates prior to loading into the furnaces. Dedicated dump rinsers with spin rinse dryers give 30 minute clean times for wafers. A HF dip is available for removal of native oxides prior to deposition. The tanks are sized to handle a full boat of 100 mm wafers. Capabilities:
Additional Resources:Equipment Information SheetBack to Top |
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FURNACE PROCESSING
Boron Doping - D1 Carbon Nanotube/Graphene Furnace CMOS N+ Polysilicon - D3 CMOS Wet Oxide - E2 General Material Anneal 1 - A1 LPCVD CMOS Nitride - E4 LPCVD LTO - B3 LPCVD Nitride - B4 MOS Clean MOS Clean Anneal 2 - B1 MOS Metal Anneal 3 - C1 MOS Metal Anneal 4 - C2 N+/P+ Polysilicon - C4 Phosphorus Doping - D2 TFT LPCVD LTO410 - A3 TFT Polysilicon - A4 TFT Wet/Dry Oxide - A2 Wet/Dry Oxide - B2 Back to Equipment List |
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This material is based upon work supported by the National Science Foundation under Grant No. ECS-0335765. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation. Cornell NanoScale Science & Technology Facility (CNF) 250 Duffield Hall, Cornell University, Ithaca, New York 14853-2700 Voice: 607-255-2329, Fax: 607-255-8601, Email: information@cnf.cornell.edu Powered by ITX |
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